products

UART and MICROCONTROLLER (MPU/CPU) Cores		VHDL	Verilog	Altera Netlist (1)	Xilinx Netlist (2)
C16MX750	(PDF)
C16550	(PDF)
C16550S Fully synchronous CPU I/F	(PDF)
C16450	(PDF)
C16450S Fully synchronous CPU I/F	(PDF)
C8251			By REQUEST
C8250			By REQUEST
C6850
C_UART

C68MX03			By REQUEST
C68MX11 (SCI, SPI, TIMER UNIT, RTI, PA )	(PDF)		By REQUEST
C68MX11_CPU	(PDF)		By REQUEST
(1) optimized for implementation with Altera programmable logic devices such as the MAX7000™, FLEX 6000™, FLEX 8000™, FLEX 10K™, APEX 20K™, and ACEX CPLDs. Others by request. Altera Cores Megafunctions Optimized for Altera Devices Altera's new AMPP Approval program qualifies a core against their own rigorous sales and engineering standards. This testing includes ensuring flawless implementation through Altera's suite of internal and third-party EDA tools, as well as the availability of accurate and complete technical documentation. Our cores are gradually being submitted to the new qualitication process, and several have already received the "AMPP Stamp" of approval.
(2) We offer firm cores (gate-level netlists) and hard cores (placed and routed netlists) optimized for implementation with all Xilinx programmable logic devices Others by request Reusable Functions Optimized for Xilinx Devices